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| 飞思卡尔Kinetis L系列MCU的时钟运行机制分析与编程方法 | |
| 引用本文： | 朱仕浪,王宜怀,冯德旺.飞思卡尔Kinetis L系列MCU的时钟运行机制分析与编程方法[J].福州大学学报(自然科学版),2014,42(5):694-699. |
| 作者姓名： | 朱仕浪 王宜怀 冯德旺 |
| 作者单位： | 1. 福建农林大学计算机与信息学院,福建福州350002;苏州大学计算机科学与技术学院,江苏苏州215006 2. 苏州大学计算机科学与技术学院,江苏苏州,215006 3. 福建农林大学计算机与信息学院,福建福州,350002 |
| 基金项目： | 国家自然科学基金资助项目(60871086),福建省自然科学基金资助项目(2012J01190),福建省教育厅B类资助项目(JB12061). |
| 摘 要： | 飞思卡尔Kinetis L系列MCU时钟系统含有内部参考时钟源、锁频环FLL、锁相环PLL、震荡器OSC、实时时钟RTC等时钟源机构,并提供了多种时钟模式为各种低功耗应用提供了技术基础.本文基于KL25时钟系统工作机制的剖析、时钟的测试、分析以及时钟模式的比较,简洁梳理时钟模式、时钟源的频率、精度、应用范围、工作条件、配置要点等技术要素和编程要点.以串口UART的时钟选用为实例,给出具体的时钟选用过程. |
| 关 键 词： | 多功能时钟发生器 低功耗 振荡器 锁相环 锁频环 |
Operation mechanism analysis and programming methods of Freescale Kinetis L series MCU clock |
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| ZHU Shi-lang,WANG Yi-huai and FENG De-wang.Operation mechanism analysis and programming methods of Freescale Kinetis L series MCU clock[J].Journal of Fuzhou University(Natural Science Edition),2014,42(5):694-699. | |
| Authors: | ZHU Shi-lang WANG Yi-huai and FENG De-wang |
| Institution: | College of Computer and Information;Fujian Agriculture and Forestry University,Fuzhou;china School of Computer Science and Technology,Soochow University;China,School of Computer Science and Technology,Soochow University;China,College of Computer and Information;Fujian Agriculture and Forestry University,Fuzhou;china |
| Abstract: | Freescale 2013 officially launched the Kinetis L series MCU (ARM Cortex-M0 kernel), is a traditional 8/16 bit MCU upgrade products. Its clock system includes an internal reference clock source, locked loop FLL, phase-locked loop PLL, oscillator OSC, the RTC and other institutions. The various clock modes provide the technical foundation for a variety of low-power applications. Faced with such a multifunctional clock system how to properly configure and rational use of these clock sources, it is worthy of further analysis. The paper concise combed clock mode, the clock source frequency, accuracy, range of applications, working conditions, configuring point and other technical factors and programming elements based on the analysis of the working mechanism of the clock system KL25, testing, and the comparison. The paper provides a good reference for a reasonable choice and properly configured clock to embedded systems development. |
| Keywords: | MCG Low power OSC PLL FLL |
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