用进位存储加法器快速实现串行乘除法和平方根计算

为适应嵌入式低功耗微处理器的应用，提出了可同时实现浮点乘除法和平方根计算宏模块（MDS）的同步串行实现方式。乘法计算采用Booth算法迭代，除法与平方根计算的实现采用基4SRT算法，在迭代中共用商位查询表，可同步实现部分冗余结果向非冗余二进制的转换。为加快迭代的速度，摒弃了进位传递加法器（CPA），而采用进位存储加法器（CSA）来实现迭代中的加法运算。宏模块设计控制逻辑简单，资源面积占用少，迭代时间短，经可编程逻辑器件验证，速度可提高1倍以上。在此基础上，提出了对除法和平方根计算异步自定时实现方式的改进方案，该实现方式不仅易于版图布线，而且大大降低了瞬态功耗。

Fast Serial Computation for Combined Multiplication,Division and Square Root

To be used for embedded low power application, the proposed arithmetic macro module MDS (multiplication, division and square root) is serially computed and its design is based on synchronized circuit. The Booth algorithm is applied in multiplication calculation, while the computation of division and square root is based on SRT algorithm. The shared quotient selection function and on the fly conversion is embedded in SRT iterative structure. To improve MDS iteration performance, the carry propagation adder (CPA) in previous architecture has been replaced with carry save adder (CSA)in which the addition have no carry porpagation. With control simplicity, low design area and fast work frequency has been verified by using programmable device. Furthermore, the asynchronous self timed design for SRT algorithm is discussed. The proposed scheme has significant improvement in transient power consumption and low area cost, and makes it easy for data bus routing in layout design.