首页 | 本学科首页   官方微博 | 高级检索  
     检索      

基于内外两级并行的多通道闪存存储系统设计
引用本文:秦国杰,谢民,高梅国,傅雄军,刘国满.基于内外两级并行的多通道闪存存储系统设计[J].北京理工大学学报,2013,33(8):841-847.
作者姓名:秦国杰  谢民  高梅国  傅雄军  刘国满
作者单位:北京理工大学 信息与电子学院,北京,100081;北京理工大学 信息与电子学院,北京,100081;北京理工大学 信息与电子学院,北京,100081;北京理工大学 信息与电子学院,北京,100081;北京理工大学 信息与电子学院,北京,100081
基金项目:国家自然科学基金资助项目(61001190)
摘    要:针对单片闪存存取速率低、存储容量小的问题,根据对NAND型闪存存取带宽影响因素的分析,提出了一种多通道闪存存储系统结构,同时采用通道间流水和通道内交织两级并行访问方法提高存储系统吞吐量,推导出了通道内外并行多通道存储系统的存取带宽计算公式. 此外,通过给出的系统并行加速比公式,对影响系统并行加速性能的原因进行了分析. 设计和实现了以该系统模型为核心的多通道闪存存储模块,验证了两级并行方法的可行性和有效性. 

关 键 词:闪存存储系统  多通道架构  通道间流水  通道内交织
收稿时间:2012/3/27 0:00:00

Multi-Channel Flash Storage System Using Two-Level Parallel Accessing Method
QIN Guo-jie,XIE Min,GAO Mei-Guo,FU Xiong-jun and LIU Guo-man.Multi-Channel Flash Storage System Using Two-Level Parallel Accessing Method[J].Journal of Beijing Institute of Technology(Natural Science Edition),2013,33(8):841-847.
Authors:QIN Guo-jie  XIE Min  GAO Mei-Guo  FU Xiong-jun and LIU Guo-man
Institution:School of Information and Electronics, Beijing Institute of Technology, Beijing 10081, China
Abstract:A new multi-channel flash storage architecture based on intra-channel interleaving and inter-channel pipelining method was introduced. The theory of the multi-channel architecture was stated and the bottleneck of the throughput of NADN flash storage system was analyzed. Then, the bandwidth formula and speed-up ratio formula under the proposed two-level parallel method were derived. The reason of affecting the speed up rate was analyzed. In the end,the diagram of the multi-channel flash storage module based on proposed multi-channel architecture is given, which proves the validity and feasibility of the proposed method.
Keywords:flash storage system  multi-channel architecture  intra-channel interleaving  inter-channel pipelining
本文献已被 CNKI 万方数据 等数据库收录!
点击此处可从《北京理工大学学报》浏览原始摘要信息
点击此处可从《北京理工大学学报》下载免费的PDF全文
设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号