基于改进x2n次方器的二进制域快速模逆

研究椭圆曲线加密算法（ECC）中模逆运算的硬件结构.实现了2个基于Itoh-Tsujii算法（ITA）的模逆硬件结构，最小时钟周期模逆结构（LCC）和高速模逆结构（HS），两种结构均使用简化为非迭代逻辑的二进制域2n次方器和模乘器，并在Xilinx Virtex-5上实现.综合结果表明，本算法提高了时钟频率，两种结构分别达到了不同场景的最小延迟.LCC结构在GF （2163）上用9周期完成运算，频率达到126.1 MHz，性能比以往工作提高56%；HS结构在GF （2193）上用20周期完成两次运算，频率达到177.6 MHz，性能比以往工作提高134%. 

A Fast Modular Inversion Architecture over GF(2m) Based Modified x2n Units

A high-speed hardware architecture was presented to implement modular inversion operations for the field of elliptic curve cryptograph (ECC) in the paper. Two hardware architectures based on Itoh-Tsujii algorithm (ITA), Least-Cock-Cycle-ITA (LCC-ITA) architecture and high-speed-ITA (HS-ITA) architecture, were built and implemented on Xilinx Virtex-5. In the architectures, power operations and multiplications were simplified into non-iterative logic to speed up modular inversion operations. The test results show that the operating frequencies of both architectures are higher than the work before. LCC-ITA architecture takes nine clock cycles to complete a modular inversion operation with the operating frequency 126.1 MHz over GF(2¹⁶³), while HS-ITA architecture takes 20 cycles with the operating frequency 177.6 MHz over GF(2¹⁹³).