基于FPGA的通用异步收发机的设计

阐述了通用异步收发机(UART)异步串行通信原理,介绍了实现UART异步串行通信的硬件接口电路及各部分硬件模块,同时还介绍了用硬件描述语言Verilog来开发UART通信接口电路模块的方法.研究基于Verilog语言,结合有限状态机的设计方法来实现UART,将其核心功能集成到现场可编程门阵列(FPGA)上,使其整体设计紧凑、小巧,实现的UART功能稳定、可靠;同时,与其他设计方法相比较,利用有限状态机的方法具有结构模式直观简单,设计流程短,程序层次分明,易综合,可靠性高等优点,这种方法必将在电子设计自动化(EDA)技术中发挥重要作用.

DESIGN OF UART CIRCUIT BASED ON FPGA

This paper describes the function and characteristics of UART with FSM in Verilog. The key functions of FPGA, which include baud rate producer, transmitter and receiver, were implemented on FPGA. The simulation result is also given in this paper. When the Verilog program is downloaded in a FPGA chip, it works well and the data is totally correct. This design can perform the main function of UART OUS communication The circuit is simple and it works stably and credibly. It can be embedded in varisystems flexibly.