基于FPGA 的1553B 总线的接口设计

针对传统应用飞机内部时分指令/ 响应型多路串行数据总线(MIL-STD-1553B: Military Standard 1553 Bus)需要大量外围芯片的问题, 在研究MIL-STD-1553 总线协议的基础上, 实现一种以现场可编程逻辑器件(FPGA:Field Programmable Gate Array)为核心的1553B 接口模块。综合分析了FPGA 控制1553B 总线的原理和过程,
给出了FPGA 控制通用串行总线(USB: Universal Serial Bus)的实现方法。采用变压器耦合的方式, 通过HI-1567转换器, 将信号送入FPGA 中, 利用FPGA 内部丰富的逻辑资源完成对总线数据的采集、编解码以及与PC(Personal Computer)机的通信, 并将FPGA 接收到的数据信息显示在PC 机上。实验结果表明, 该设计方案完
成了总线数据的发送和接收, 实现了总线数据的正确传输, 不但减少了大量的外围电路, 而且提高了系统的可靠性和实时性。

Design of 1553B Bus Interface Based on FPGA

Traditional application MIL-STD-1553B ( Military Standard 1553 Bus) data bus requires many peripheral chips. Based on the study of MIL-STD-1553 bus protocol, 1553B interface module and FPGA (Field Programmable Gate Array) are designed. I use transformer coupling, through HI-1567 converter, send the signal to the FPGA. And I use abundant logic resources in FPGA to complete the bus data gathering, encoding, decoding and communicate with the PC. And I comprehensively analyze the principles and processes of FPGA control 1553B bus. Then, I give specific method of FPGA control USB interface. Finally, FPGA received data is displayed on the PC. The experiment results show that the plan using FPGA to realize 1553B bus interface, reduces a lot of peripheral circuits, improves the reliability and real-time performance of the system, completes the bus data sending and receiving, achieves a lossless data transfer.