| C波段低相噪数字锁相频率合成器 |
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| 引用本文： | 方立军,马骏.C波段低相噪数字锁相频率合成器[J].系统工程与电子技术,2001,23(2):22-24. |
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| 作者姓名： | 方立军 马骏 |
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| 作者单位： | 华东电子工程研究所 , |
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| 摘 要： | 在较详细分析常规移频数字锁相频率合成器的基础上，提出了4?890MHz～5030MHz一种C波低相噪数字锁相频率合成方法，对此进行了分析、讨论。对环路滤波器参数和合成器相位噪声进行了估算，并给出了研制结果L
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| 关 键 词： | 数字锁相环 频率合成器 杂波抑制 |
| 文章编号： | 1001-506X(2001)02-0022-03 |
| 修稿时间： | 2001年1月17日 |
C-Band Low Phase Noise
DPLL's Frequency Synthesizer |
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| Fang Lijun Ma Jun East China Research Institute of Electronic Engineering,Hefei.C-Band Low Phase Noise
DPLL''''s Frequency Synthesizer[J].System Engineering and Electronics,2001,23(2):22-24. |
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| Authors: | Fang Lijun Ma Jun East China Research Institute of Electronic Engineering Hefei |
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| Institution: | Fang Lijun Ma Jun East China Research Institute of Electronic Engineering,Hefei 230031 |
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| Abstract: | On the basis of analyzing conventional digit PLL of frequencyshifting feedback in detail, the synthesizing method of 4890MHz～5030MHz C-band frequency synthesizer of low phase noise DPLL is presented, and the analysis and discussion are introducted. Filter parameter and phase noise of the synthesize are estimated, at lase the performances of the synthesizer are given, Lφo(1kHz)≈-103dBc/Hz,Lφo(100kHz)≈-120dBc/Hz. The synthesizer has been applied in the new generation doppler weather radar. |
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| Keywords: | Digit phase locked Frequency synthesizer Clutter suppression |
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