基于可编程逻辑器和VHDL语言的容错电路设计

论述了最新的可编程逻辑技术和硬件描述语言VHDL在数字电路系统的设计和仿真中的应用。这种方法的优点是可以用简单的软件语言代替复杂的电子电路硬件,针对传统的数字电路系统中故障检测电路和容错电路硬件设计较为复杂的问题进行了分析和简化设计。在此基础之上进行了数字系统的三通道/单通道筛选冗余容错电路的设计和仿真。

Design of Fault-Tolerant Circuit Based on Programmable Logic Device and VHDL

The application of the latest programmable logic device technology and VHDL in the design and simulation of the digital circuit is discussed. The advantage of this method lies in its using simple software instead of complex hardware. In this paper, a simplified a analysis is made on the problem of the complex design is adopted to solve the problem that the design of traditional fault detection and fault-tolerant circuits is,and accordingly a simplified design is fulfilled. On this basis,the design and simulation of three-channel channel or single-channel redundant fault-tolerant circuit of a digital system are performed.