| 全数字化锁相倍频器的设计 |
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| 引用本文： | 黄涛,严普强.全数字化锁相倍频器的设计[J].清华大学学报(自然科学版),1990(2). |
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| 作者姓名： | 黄涛 严普强 |
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| 作者单位： | 精密仪器及机械学系
(黄涛)，精密仪器及机械学系(严普强) |
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| 摘 要： | 提出了一种高速、高精度、全数字化电路的锁相信频器的设计，该锁相倍频 器对于切换的输入信号能保证在两个周期内锁定。对于变频信号，其频率跟踪速度也 快。在环路中使用了单片机以对输入信号的频率变化进行预测，从而进一步提高其跟踪 精度。
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| 关 键 词： | 数字信号处理 锁相环 倍频器 |
A Design of Digital Phase--locked Frequency Multiplier |
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| Huang Tao,Yan Puqiang.A Design of Digital Phase--locked Frequency Multiplier[J].Journal of Tsinghua University(Science and Technology),1990(2). |
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| Authors: | Huang Tao Yan Puqiang |
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| Institution: | Huang Tao,Yan Puqiang Department of Precision Instrument and Mechanology |
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| Abstract: | A degisn of a wholly digital phase--locked frequency multiplier(PLFM) of high speed and precision is presented. The PLFM can lock in with the switched signal withen two periods. It also inherents the fast response of frequency tracking with the increase or decrease of signal frequency. A single chip microprocessor is used in the circuit to predict the change of the input frequency,assisting thus to improve the accuray of frequency tracking. |
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| Keywords: | digital signal processing phase locked loop frequency multiplier |
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