XB-SIM*: A Simulation Framework for Modeling and Exploration of ReRAM-Based CNN Acceleration Design

Resistive Random Access Memory(ReRAM)-based neural network accelerators have potential to surpass their digital counterparts in computational efficiency and performance. However, design of these accelerators faces a number of challenges including imperfections of the Re RAM device and a large amount of calculations required to accurately simulate the former. We present XB-SIM, a simulation framework for Re RAM-crossbar-based Convolutional Neural Network(CNN) accelerators. XB-SIM can be flexibly configured to simulate the accelerator's structure and clock-driven behaviors at the architecture level. This framework also includes an Re RAM-aware Neural Network(NN) training algorithm and a CNN-oriented mapper to train an NN and map it onto the simulated design efficiently. Behavior of the simulator has been verified by the corresponding circuit simulation of a real chip. Furthermore, a batch processing mode of the massive calculations that are required to mimic the behavior of Re RAM-crossbar circuits is proposed to fully apply the computational concurrency of the mapping strategy. On CPU/GPGPU, this batch processing mode can improve the simulation speed by up to 5.02 or 34.29. Within this framework, comprehensive architectural exploration and end-to-end evaluation have been achieved, which provide some insights for systemic optimization.