| 异步电路的低功耗状态机AFSM的设计与实现 |
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| 引用本文： | 马依迪,侯建军,马媛媛. 异步电路的低功耗状态机AFSM的设计与实现[J]. 北京交通大学学报(自然科学版), 2006, 30(2): 61-64 |
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| 作者姓名： | 马依迪 侯建军 马媛媛 |
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| 作者单位： | 北京交通大学,电子信息工程学院,北京,100044;北京交通大学,电子信息工程学院,北京,100044;北京交通大学,电子信息工程学院,北京,100044 |
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| 摘 要： | 基于CMOS低功耗门控技术,设计了一种应用于ASIC中的异步状态机(AFSM).关键是将原始的同步状态机分解为若干个能够相互通信的子状态机,提高子状态机的自循环率,进而通过异步控制子状态机,达到降低功耗的目的.将该思想应用于VLSI设计实例,证明了采用这种异步状态机设计能够有效节省片上系统(SoC)的功耗最高达25%以上,并且不会过多地增加芯片面积.
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| 关 键 词： | CMOS低功耗设计 异步状态机 自循环率 时钟门控 |
| 文章编号： | 1673-0291(2006)02-0061-04 |
| 收稿时间： | 2005-05-16 |
| 修稿时间： | 2005-05-16 |
Design and Implementation of Low-Power Asynchronous Finite State Machine |
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| MA Yi-di,HOU Jian-jun,MA Yuan-yuan. Design and Implementation of Low-Power Asynchronous Finite State Machine[J]. JOURNAL OF BEIJING JIAOTONG UNIVERSITY, 2006, 30(2): 61-64 |
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| Authors: | MA Yi-di HOU Jian-jun MA Yuan-yuan |
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| Affiliation: | School of Electronics and Information Engineering, Beijing Jiaotong University, Beijing 100044, China |
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| Abstract: | Based on CMOS low-power clock gating technique,an asynchronous Finite State Machine(AFSM),which is applied in ASIC design,is presented in this paper.In order to achieve low power consumption,a key method is to decompose the original FSM into a number of sub-FSMs which can communicate with each other,to increase the self-loop probability of each sub-FSM,and to control the interacting sub-FSM asynchronously.The implementation of this technique in VLSI design shows that this method leads to significant power saving up to 25% without enlarging too much area. |
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| Keywords: | CMOS low-power design asynchronous finite state machine(AFSM) self-loop probability clock gating |
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