| 基于分解等价的时序电路测试生成算法 |
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| 引用本文： | 韩之刚,赵莹,赵航,关连伟.基于分解等价的时序电路测试生成算法[J].科技信息,2007(30):27-28. |
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| 作者姓名： | 韩之刚 赵莹 赵航 关连伟 |
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| 作者单位： | 北华大学电气信息工程学院 吉林吉林132021(韩之刚，赵莹)，九台市第二中学 吉林九台130513(赵航，关连伟) |
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| 摘 要： | 针对集成电路的规模和复杂程度不断增加而相应的测试却越来越困难且费时的问题,提出了一种基于分解等价的时序电路测试生成算法。此算法通过引入分解等价以避免进入已搜索的测试码解空间,缩小了测试码搜索空间,大大提高了测试生成效率。在ISCAS’89国际标准电路上的实验结果表明了本算法的可行性。
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| 关 键 词： | 分解等价 测试生成 蕴含 |
Sequential Circuits Test Generation Algorithm Based On Decomposition Equivalence |
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| HAN Zhigang,ZHAO Hang,GUAN Lianwei,QU Pingping.Sequential Circuits Test Generation Algorithm Based On Decomposition Equivalence[J].Science,2007(30):27-28. |
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| Authors: | HAN Zhigang ZHAO Hang GUAN Lianwei QU Pingping |
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| Institution: | HAN Zhigang1,ZHAO Hang2,GUAN Lianwei2,QU Pingping1 |
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| Abstract: | With the growth in complexity of integration circuits,test generation for them is becoming increasingly difficult and time consuming. In this paper,a sequential circuits test generation algorithm based on decomposition equivalence is proposed. It uses the method of decomposition equivalence to avoid to get into the solution space of test codes which has been reached,reducing the research space of test codes and improving test generation efficiency. The experimental results on ISCAS'89 international standard circuits demonstrate the feasibility of this algorithm. |
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| Keywords: | decomposition equivalence test generation implication |
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