| 数字计时器的逻辑设计 |
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| 引用本文： | 张诚庆,周瑞清.数字计时器的逻辑设计[J].北京化工大学学报(自然科学版),1988(2). |
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| 作者姓名： | 张诚庆 周瑞清 |
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| 作者单位： | 北京化工学院化工自动化系
(张诚庆)，北京化工学院化工自动化系(周瑞清) |
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| 摘 要： | 作者给出了电子数字计时器的一种逻辑设计方案,方案中由于选用了“三位半钟用半导体数字板”作为显示器件,在“时十位”,采用了触发器直接驱动“时十位”显示器的方案,改变了“计数-译码驱动-显示”的传统设计方案,从而使线路简单、成本下降、可靠性提高.
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| 关 键 词： | 数字仪表 数字电路 计时器 数字显示 数字显示仪 |
Logic Design of Digital Timer |
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| Zhang Chengqing,Zhou Ruiqing.Logic Design of Digital Timer[J].Journal of Beijing University of Chemical Technology,1988(2). |
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| Authors: | Zhang Chengqing Zhou Ruiqing |
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| Institution: | Department of Chemical Automation |
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| Abstract: | A design scheme of electronic digital timer made up of logic integrated circuits is described in this paper. In the design a 3 1/2 light-emittingdiode (LED) display plate produced for digital timer was used to indicate the real time and. In order to improve the conyentional design pattern of counter-decoder-driver-display, the ten-hour's place on displayer is drived directly by the output of a flip-flop so that it has the advantages of simple, cheap and reliable. |
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| Keywords: | digital instrument digital circuit timers digital display digital-display instrument |
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