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基于FPGA的IP仿真验证平台
引用本文:郑学仁,邓婉玲,范健明,陈玲晶,陈国辉,林晓伟.基于FPGA的IP仿真验证平台[J].华南理工大学学报(自然科学版),2006,34(1):38-42.
作者姓名:郑学仁  邓婉玲  范健明  陈玲晶  陈国辉  林晓伟
作者单位:华南理工大学,物理科学与技术学院,广东,广州,510640
基金项目:广东省科技厅科技攻关项目
摘    要:IP(集成电路知识产权芯核)的仿真和硬件验证是IP开发中不可缺少的环节.文中基于FPGA(现场可编程门阵列)开发了一个IP仿真验证平台,并使用PCI(外部设备互连)总线来测试IP.用户只要将自已设计的IP插入所开发的仿真验证平台,就可以方便地对IP进行测试.文中还对所设计的平台进行了软件仿真,以验证其功能,并在载有Xilinx Spartan-3 600E FPGA的PCI插卡上进行上板调试.结果表明,所建立的基于FPGA的IP仿真验证平台可以对IP进行有效的仿真和验证,并具有良好的稳定性和实用价值.

关 键 词:现场可编程门阵列  集成电路知识产权芯核  仿真  验证  外部设备互连
文章编号:1000-565X(2006)01-0038-05
收稿时间:2004-09-17
修稿时间:2004年9月17日

An IP Simulation and Verification Platform Based on FPGA
Zheng Xue-ren,Deng Wan-ling,Fan Jian-ming,Chen Ling-jing,Chen Guo-hui,Lin Xiao-wei.An IP Simulation and Verification Platform Based on FPGA[J].Journal of South China University of Technology(Natural Science Edition),2006,34(1):38-42.
Authors:Zheng Xue-ren  Deng Wan-ling  Fan Jian-ming  Chen Ling-jing  Chen Guo-hui  Lin Xiao-wei
Institution:College of Physical Science and Technology, South China Univ. of Tech. , Guangzhou 510640, Guangdong, China
Abstract:The simulation and hardware verification of IP (Intellectual Property) is an indispensable step in IP development. In this paper, an IP simulation and verification platform is developed based on FPGA ( Field Programmable Gate Array), and PCI (Peripheral Component Interconnect) bus is used to test IP cores. Thus, a target IP inserted into the platform can be easily tested. The proposed platform is then simulated to verify the functions, and is debugged in a PCI add-on card with Xilinx Spartan-3 600E FPGA. The results show that, on the proposed FPGA-based IP simulation and verification platform, IP can be effectively simulated and verified with good stability, which illustrates the practicability of the platform.
Keywords:Field Programmable Gate Array  Intellectual Property  simulation  verification  Peripheral Component Interconnect
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