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改善辐照加固设计流水线型模数转换器性能的抖动电路技术
引用本文:余金山,梁盛铭,马卓,王育新,张瑞涛,刘涛,李婷,俞宙.改善辐照加固设计流水线型模数转换器性能的抖动电路技术[J].上海交通大学学报,2013,47(1):129-133.
作者姓名:余金山  梁盛铭  马卓  王育新  张瑞涛  刘涛  李婷  俞宙
作者单位:(1.国防科学技术大学 计算机学院, 长沙 410073; 2.中国电子科技集团公司第二十四研究所 模拟集成电路国家重点实验室, 重庆 400060)
基金项目:国家自然科学基金,模拟集成电路实验室基金,核高基重大专项,信息保障技术重点实验室基金
摘    要:提出了一种能够改善高精度辐照加固设计流水线型模数转换器(ADC)动态性能指标的减式抖动电路技术.其中,基于深度伪随机数生成器所产生的伪随机数来驱动高精度数模转换器而生成所需的抖动信号,将抖动信号与ADC的输入信号相加输送给ADC进行量化,并将抖动信号从ADC量化输出中减去,以降低ADC的信噪

关 键 词:抖动    流水线    抗辐照加固设计    模数转换器  
收稿时间:2012-05-29

Dither Circuit to Improve Performance for a Radiation Hardening by Design Pipeline Analog to Digital Converter
YU Jin-shan,LIANG Sheng-ming,MA Zhuo,WANG Yu-xin,ZHANG Rui-tao,LIU Tao,LI Ting,YU Zhou.Dither Circuit to Improve Performance for a Radiation Hardening by Design Pipeline Analog to Digital Converter[J].Journal of Shanghai Jiaotong University,2013,47(1):129-133.
Authors:YU Jin-shan  LIANG Sheng-ming  MA Zhuo  WANG Yu-xin  ZHANG Rui-tao  LIU Tao  LI Ting  YU Zhou
Institution:(1. College of Computer, National University of Defense Technology, Changsha 410073, China; 2. No.24 Research Institute of China Electronic Technology Group Corporation, Laboratory of Analog Integrated Circuit, Chongqing 400060, China)
Abstract:A subtractive dither technology to improve performance for a high-resolution radiation hardening by design pipeline analog-to-digital converter was proposed. The dither signal generation is based on a deep multi-bits pseudo-random number generator driving a 5-bit high-resolution digital to analogue conversion (DAC). This dither signal is added with analog to digital converter (ADC) input signal, sampled, quantized and then digitally subtracted from the ADC output, thereby causing no significant degradation signal noise ratio (SNR). The measured results show that the proposed dither technology can efficiently improve static and dynamic performance of the ADC, especially when the ADC quantizes a small-signal input.
Keywords:dither  pipeline  radiation hardening by design  analog to digital converter (ADC)  
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