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一款高吞吐率RSA密码处理器的设计
引用本文:刘强,马芳珍,佟冬,程旭.一款高吞吐率RSA密码处理器的设计[J].北京大学学报(自然科学版),2005,41(5):754-763.
作者姓名:刘强  马芳珍  佟冬  程旭
作者单位:[1]北京大学微处理器研究开发中心,北京100871 [2]北京大学计算机科学技术系,北京100871 [3]对外经济贸易大学信息学院,北京100029
摘    要:介绍了采用蒙哥马利模乘法算法和指数的从右到左的二进制方法,并根据大整数模乘法运算和VLSI实现的要求进行改进的RSA处理器,在提供高速RSA处理能力的同时,可抵抗某些定时分析攻击和功耗分析攻击.该RSA处理器在其模乘法器中使用了CSA(进位保留加法器)结构以避免长进位链,并采用一种新型(4∶2)压缩器结构以减少面积和延迟.提出了信号多重备份的方法,解决信号广播带来的大的负载和线长问题.数据通路的设计采用一种基于多选器的动态重构方法,其模乘法器可以执行一个1 024位的模乘幂运算,也可以并行执行2个512位的模乘幂运算,从而支持基于中国剩余定理的加速策略.

关 键 词:RSA密码处理器  蒙哥马利模乘法器  模乘幂器  公钥基础设施  超大规模集成电路  进位保留加法器结构  信号广播  中国剩余定理
收稿时间:2004-03-22
修稿时间:2004-03-222004-05-26

Design Features of a High Throughput RSA Cryptoprocessor
Liu Jiang;Ma FangZhe;Tong Dong;Cheng Xu.Design Features of a High Throughput RSA Cryptoprocessor[J].Acta Scientiarum Naturalium Universitatis Pekinensis,2005,41(5):754-763.
Authors:Liu Jiang;Ma FangZhe;Tong Dong;Cheng Xu
Abstract:Montgomery multiplication algorithm is optimized for large-bit modular multiplication and VLSI implementation. It is combined with the R-L (Right to Left) binary method to achieve speed improvement. Special efforts are focused on the problems with long-bit modular arithmetic. A Carry-Save-Adder architecture, which is implemented by redesigned (4∶2) compressors, is used in the multiplier to avoid the long carry propagation. A signal-backup strategy is used to resolve the problem of signal broadcasting. Using a multiplexer- based method, the datapath of the multiplier is reconfigurable to perform either one 1 024-bit multiplication or two 512-bit multiplications in parallel. The Chinese Remainder Theorem (CRT) increases the decryption data rate by a factor of 3.8.
Keywords:RSA cryptoprocessor  Montgomery modular multiplier  modular exponentiator  public-key infrastructure (PKI)  VLSI  carry-save-adder architecture  signal broadcasting  Chinese Remainder Theorem (CRT)
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