一种串行的有限域平方和算法及其VLSI结构

提出了一种迭代的有限域平方和算法,每次迭代完成一次比特乘法和模不可约多项式F(x)运算.基于此算法设计出了一种新的串行电路结构.它的面积复杂度和吞吐量分别为O(m)和1/m.与一些已提出的平方和电路结构相比,该结构具有低面积复杂度.它适合具有小面积要求的VLSI设计.此结构可用来计算指数和平方运算.

Serial Circuit Architecture for Power-Sum in GF(2m)

An iterative algorithm for computing power-sum in GF(2~m) is proposed using polynomial basis.During each iteration step,one bit-vector polynomial multiplication and reduction modulo of irreducible polynomial are computed.Based on this algorithm,a new serial power-sum circuit architecture is designed,with area complexity of O(m),and throughput of one result per m clock cycle. Compared with existing power-sum architectures,the proposed method has small area complexity,thus well is suited to VLSI design of applications with small chip area requirements.The power-sum architecture can be used to compute exponentiations and squares.