| 0.18μm CMOS高集成度可编程分频器的设计 |
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| 引用本文： | 郑立博,张长春,郭宇锋,方玉明,刘蕾蕾.0.18μm CMOS高集成度可编程分频器的设计[J].南京邮电大学学报(自然科学版),2014(3):75-79. |
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| 作者姓名： | 郑立博 张长春 郭宇锋 方玉明 刘蕾蕾 |
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| 作者单位： | [1]南京邮电大学电子科学与工程学院,江苏南京210023 [2]东南大学毫米波国家重点实验室,江苏南京210096 |
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| 基金项目： | 国家自然科学基金（61076073）、中国博士后科学基金（2012M521126）、江苏省自然科学基金（BK2012435）、东南大学毫米波国家重点实验室开放基金（K201223）和南京邮电大学科研启动金（NY211016）资助项目 |
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| 摘 要： | 采用标准0.18 μm CMOS工艺,提出了一种高集成度可编程分频器.该电路所采用技术的新颖之处在于：基于基本分频单元的特殊结构,对除2/除3单元级联式可编程分频器的关键模块进行改进,将普通的CML型锁存器集成为包含与门的锁存器,从而大大提高了电路的集成度,有效地降低了电路功耗,提升了整体电路速度,并使版图更紧凑.仿真结果表明,在1.8V电压、输入频率Fin=1 GHz的情况下,可实现任意整数且步长为1的分频比,相位噪声为-173.1 dBc/Hz@1 MHz,电路功耗仅为9 mW.
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| 关 键 词： | 可编程分频器 除2 除3分频单元 电流模逻辑 相位噪声 |
Design of 0.18 μm CMOS Highly Integrated Programmable Frequency Divider |
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| ZHENG Li-bo,ZHANG Chang-chun,GUO Yu-feng,FANG Yu-ming,LIU Lei-lei.Design of 0.18 μm CMOS Highly Integrated Programmable Frequency Divider[J].Journal of Nanjing University of Posts and Telecommunications,2014(3):75-79. |
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| Authors: | ZHENG Li-bo ZHANG Chang-chun GUO Yu-feng FANG Yu-ming LIU Lei-lei |
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| Institution: | 1.College of Electronics Science and Engineering, Nanjing University of Posts and Telecommunications ,Nanjing 210023, China; 2.College of Electronics Science and Engineering, Nanjing University of Posts and Telecommunications ,Nanjing 210023, China ;State Key Laboratory of Millimeter Waves, Southeast University, Nanjing 210096 ,China;) |
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| Abstract: | A highly integrated programmable divider is designed according to the standardized 0.18 μm CMOS technology.Based on the special structure of divider 2/3,we improve the key module of the divider,i.e.,changing the ordinary CML D-latch to the latch including AND gate,thus it reduces the power consumption of circuit,improves the overall circuit speed,and makes the layout more compact.Simulation results show that the arbitrary integer frequency ratio is available,the circuit has a phase noise of -173.1 dBc/Hz@1 MHz,and a power consumption of 9 mW in terms of supply voltage of 1.8 V and input frequency of 1 GHz. |
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| Keywords: | programmable frequency divider divider2/3 CML phase noise |
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