| Abstract: | A new digital transmitter based on delta sigma modulator( DSM) with bus-splitting is presented in this paper. The second order low pass error-feedback delta sigma modulator( EF-DSM) is focused. The signal to noise ratio( SNR) of the EF-DSM is derived for different bus-splitting bits.Following the EF-DSM,a multi-bit digital up mixer is used for carrier frequency transform. In order to validate the theory of bus-splitting,two types of transmitters are implemented on FPGA for comparison,in which one is with non-bus-splitting and the other is with bus-splitting. The FPGA implemented transmitter with bus-splitting promotes the maximum operation speed by 39%,and reduces hardware consumptions more than 16%. Both single tone and orthogonal frequency division multiplexing( OFDM) signal source are used to evaluate the proposed transmitter. |
