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SystemC在UART的IP软核设计中的应用
引用本文:董玲,陶建中,张松,黄越. SystemC在UART的IP软核设计中的应用[J]. 江南大学学报(自然科学版), 2007, 6(2): 208-211
作者姓名:董玲  陶建中  张松  黄越
作者单位:1. 江南大学,信息工程学院,江苏,无锡,214122
2. 江南大学,信息工程学院,江苏,无锡,214122;中国电子科技集团公司,第五十八研究所,江苏,无锡,214035
摘    要:在IP软核的设计过程中,可以利用SystemC行为模型描述特点代替传统HDL语言,建立行为模型和验证平台.以一个通用异步收发器的IP核设计为例,详细讨论整个IP软核的设计流程,重点分析了行为模块和验证模块的设计.结果表明,SystemC对于提高代码效率和IP开发速度有着重要作用.

关 键 词:IP核  通用异步收发器  systemC  验证平台
文章编号:1671-7147(2007)02-0208-04
收稿时间:2005-04-21
修稿时间:2005-04-212005-06-07

Research on SystemC Application in UART IP Soft Core Design
DONG Ling,TAO Jian-zhong,ZHANG Song,HUANG Yue. Research on SystemC Application in UART IP Soft Core Design[J]. Journal of Southern Yangtze University:Natural Science Edition, 2007, 6(2): 208-211
Authors:DONG Ling  TAO Jian-zhong  ZHANG Song  HUANG Yue
Affiliation:1. School of Information Technology, Southern Yangzte University, Wuxi 214122, China; 2. China Electronics Technology Group Corporation The 58th Research Institute, Wuxi 214035, China
Abstract:Since systemC language was good at behavior description,design method of behavior models and testbenchs using systemC instead of HDL in IP soft core design were introduced in this paper.Furthermore,an UART core design example was used to show the IP soft core design flow,in which design of behavior model and testbench were emphasized.The results showed that systemC had played an important role in improving code efficiency and IP developing speed.
Keywords:IP  UART  systemC  testbench
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