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基于FPGA的∑-△小数分频器实现
引用本文:丁孝永,黄培康,杨于杰. 基于FPGA的∑-△小数分频器实现[J]. 系统工程与电子技术, 2008, 30(3): 581-584
作者姓名:丁孝永  黄培康  杨于杰
作者单位:无线电计量测试研究所,北京,100854
摘    要:
针对利用小数分频锁相环实现低相位噪声、高频谱纯度合成信号源的应用场合,提出了一种应用现场可编程逻辑阵列(FPGA)实现Sigma-Delta小数分频的方法。该方法利用现场可编程逻辑阵列的灵活性和常规小数分频器分频特点,在分析Sigma-Delta小数分频器调制原理和功率谱数学模型的基础上,实现了Sigma-Delta小数分频器。给出了实现方案的原理图和试验结果,通过硬件验证该方法的有效性。

关 键 词:信号源  小数分频器  Sigma-Delta调制  FPGA
文章编号:1001-506X(2008)03-0581-04
修稿时间:2007-05-23

Approach to the Sigma-Delta fractional-N divider based on FPGA
DING Xiao-yong,HUANG Pei-kang,YANG Yu-jie. Approach to the Sigma-Delta fractional-N divider based on FPGA[J]. System Engineering and Electronics, 2008, 30(3): 581-584
Authors:DING Xiao-yong  HUANG Pei-kang  YANG Yu-jie
Abstract:
A method of realizing sigma-delta fractional-N divider based on field program programmable mable gate array(FPGA) is presented.The method can be used when synthesis signal possessing low phase noise and fine spectrum purity are desired. After investigating the modulation theory of the sigma-delta fractional-N divider and the mathematics model of power spectrum,the practical method which takes advantage of the agility of FPGA and the peculiarity of the fractional-N divider is proposed.The theory diagram and the experiment results of the project are given.This method is proved effective via hardware.
Keywords:signal source  fractional-N divider  sigma-delta modulation  field program gate array
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