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一款通用CPU的存储器内建自测试设计
引用本文:何蓉晖,李华伟,李晓维,宫云战. 一款通用CPU的存储器内建自测试设计[J]. 同济大学学报(自然科学版), 2002, 30(10): 1204-1208
作者姓名:何蓉晖  李华伟  李晓维  宫云战
作者单位:中国科学院,计算技术研究所,北京,100080
基金项目:国家“8 6 3”高技术研究发展计划重点资助项目 ( 2 0 0 1AA11110 0 ),国家自然科学基金资助项目 ( 6 9976 0 0 2 )
摘    要:存储器内建自测试(memory built-in self-test,MBIST)是一种有效的测试嵌入式存储器的方法,在一款通用CPU芯片的可测性设计(design-for-testability,DFT)中,MBIST作为cache和TLB在存储器测试解决方案被采用,以简化对布局分散,大小不同的双端口SRAM的测试。5个独立的BIST控制器在同一外部信号BistMode的控制下并行工作,测试结果由扫描链输出,使得测试时间和芯片引脚开销都降到最小,所采用的march13n算法胡保了对固定型故障,跳变故障,地址译码故障和读写电路的开路故障均达到100%的故障覆盖率。

关 键 词:CPU 存储器内建自测试 故障模型 march算法 可测性设计 超大规模集成电路 IP核
文章编号:0253-374X(2002)10-1204-05
修稿时间:2002-05-30

Memory Built-in Self-test for General-purposed CPU Chip
HE Rong-hui,LI Hua-wei,LI Xiao-wei,GONG Yun-zhan. Memory Built-in Self-test for General-purposed CPU Chip[J]. Journal of Tongji University(Natural Science), 2002, 30(10): 1204-1208
Authors:HE Rong-hui  LI Hua-wei  LI Xiao-wei  GONG Yun-zhan
Abstract:MBIST(memory built-in self-test)is very effective in testing embedded memories.In the DFT(design-for-testability)techniques used in a general-purposed CPU chip,MBIST was designed to simplify the test of distributed SRAMs of different sizes in cache and TLB.Five independent BIST controllers controlled by the same outside signal BistMode work simultaneously and the test results are scaned out through a scan chain,so that the test time and pin overhead are reduced to the lowest level.The march 13n test algorithm insures 100% fault coverage for stuck-at faults,transition faults,address decoder faults and stuck-open faults.
Keywords:memory built-in self-test  fault model  march algorithm  design-for-testability
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