| 可靠性微处理器设计关键技术研究 |
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| 引用本文： | 陈微,戴葵,刘芳.可靠性微处理器设计关键技术研究[J].华中科技大学学报(自然科学版),2005,33(Z1):111-113. |
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| 作者姓名： | 陈微 戴葵 刘芳 |
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| 作者单位： | 国防科学技术大学,计算机科学与技术学院,湖南,长沙,410073 |
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| 摘 要： | 从面积开销、性能和可靠性的角度分析比较了检错纠错码(EDAC)、三模冗余(TMR)和控制流检测(CFC)在可靠性微处理器设计中广泛使用的抗单粒子翻转(SEU)效应技术.用VHDL描述并在FPGA上实现EDAC、TMR和CFC.研究结果表明,TMR和EDAC通过保护寄存器或存储器达到高度的容错能力,但是代价较高,适用于可靠性要求较高的恶劣环境.CFC则是可靠性和代价的一个较好的折中,适用于商用可靠性微处理器的设计.
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| 关 键 词： | 单粒子翻转 容错 检错纠错码 三模冗余 控制流检测 |
| 文章编号： | 1671-4512(2005)S1-0111-03 |
| 修稿时间： | 2005年8月25日 |
Research on the keytechniques of reliable microprocessor designs |
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| Chen Wei,Dai Kui,Liu Fang.Research on the keytechniques of reliable microprocessor designs[J].JOURNAL OF HUAZHONG UNIVERSITY OF SCIENCE AND TECHNOLOGY.NATURE SCIENCE,2005,33(Z1):111-113. |
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| Authors: | Chen Wei Dai Kui Liu Fang |
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| Institution: | Chen Wei Dai Kui Liu Fang Postgraduate,School of Computer Sci.& Tech.,National University of Defense Technology,Changsha 410073,China. |
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| Abstract: | This paper analyzed and compared Error Detection and Correction Code(EDAC),Triple Module Redundancy(TMR) and Control Flow Check(CFC),which were widely used to mitigate Single Event Upset(SEU) in reliable microprocessor designs,in terms of area,performance penalty and reliability.EDAC,TMR and CFC were implemented in VHDL on FPGA.Results show that EDAC and TMR can be used to protect registers or memories in order to achieve high degree of fault tolerance with high costs and are appropriate for harsh environment requiring high reliability.CFC is a better trade-off between costs and reliability and is appropriate for commercial reliable microprocessor designs. |
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| Keywords: | single event upset fault-tolerance error detection and correction code triple module redundancy control flow check |
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