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基于NiosⅡ的电子收费专用芯片验证与测试平台设计
引用本文:李跃辉,金丽. 基于NiosⅡ的电子收费专用芯片验证与测试平台设计[J]. 南通工学院学报(自然科学版), 2013, 0(3): 23-27
作者姓名:李跃辉  金丽
作者单位:南通大学专用集成电路设计重点实验室,江苏南通226019
基金项目:交通部联合科技攻关项目(2009-353-332-290);南通市应用研究计划项目(BK2012022);南通大学交通专项(10ZJ001,11ZJ001);南通大学自然科学基金项目(102075)
摘    要:通过NiosⅡ处理器及可编程片上系统(SOPC),设计了一套电子收费(ETC)专用芯片的验证与测试平台.该平台采用Altera CyeloneⅡ EP2C35F672C6N现场可编程门阵列(FPGA)芯片,根据ETC专用芯片的功能,对FPGA芯片内的NiosⅡ处理器核配置相关外设.并编写NiosⅡ应用软件,完成ETC专用芯片的FPGA验证和测试.实践表明。该平台可以提高系统的可复用性,缩短芯片开发周期,降低成本.

关 键 词:NiosⅡ处理器  电子收费专用芯片  现场可编程门阵列

Design of the Verification and Testing Platform for Electronic Toll Collection ASIC Based on NiosII Processor
LI Yue-hui,JIN Li. Design of the Verification and Testing Platform for Electronic Toll Collection ASIC Based on NiosII Processor[J]. , 2013, 0(3): 23-27
Authors:LI Yue-hui  JIN Li
Affiliation:(Key Laboratory of Special Applied Integrated Circuit Designing, Nantong University, Nantong 226019, China)
Abstract:A platform for ETC ASIC verification and testing is proposed by the NiosⅡ processor and the method of SOPC design. Its core is Altera FPGA chip CycloneII EP2C35F672C6N. The software based on the NiosⅡ processor is programmed. By using the verification and testing platform, an ETC chip is verified and tested. As a result, it can improve the system reusability, shorten the ASIC development cycle and reduce the cost.
Keywords:
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