| 用"最小状态、最大状态"法分析任意进制计数器 |
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| 引用本文： | 李来运,牛思先,樊翠铃. 用"最小状态、最大状态"法分析任意进制计数器[J]. 济源职业技术学院学报, 2006, 5(2): 21-23 |
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| 作者姓名： | 李来运 牛思先 樊翠铃 |
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| 作者单位： | 驻马店广播电视大学,河南,驻马店,463000;济源职业技术学院,河南,济源,454650 |
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| 摘 要： | 针对用定型计数器产品构成其它进制的计数器电路,提出一种简明分析法。利用电路输出信号的最小状态、最大状态,以及状态有效循环路径,确定电路的进制。将该方法应用到实例中,取得了较好的效果。
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| 关 键 词： | 最小状态 最大状态 加法计数 减法计数 时钟信号 有效循环 |
| 文章编号： | 1672-0342（2006）01-0021-03 |
| 收稿时间： | 2005-09-14 |
| 修稿时间： | 2005-09-14 |
Analyzing Arbitrary Scale Counter by Means of "Minimum State and Maximum State" |
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| LI Lai-yun,NIU Si-xian,FAN Cui-ling. Analyzing Arbitrary Scale Counter by Means of "Minimum State and Maximum State"[J]. JOurnal of Jiyuan Vocational and Technical College, 2006, 5(2): 21-23 |
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| Authors: | LI Lai-yun NIU Si-xian FAN Cui-ling |
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| Affiliation: | 1. Zhumadian Radio and TV University, Zhumadian 463000, Henan, China; 2. Jiyuan Vocational and Technical College, Jiyuan 454650, Henan, China |
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| Abstract: | This essay is directed against other scale counter circuits that are made up of stereotyped counter, and raises a simple and clear analysis method. The scale of circuit is decided by the minimum state, the maximum state of the output signals and the effective cycle path. The method proves to be very effective in the living examples. |
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| Keywords: | minimum state maximum state addition count subtraction count clock signal effective cycle |
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