|
|||||
|
|
| 高速CMOS模拟集成电路中的静电保护电路设计 | |
| 引用本文： | 吴鹏,何乐年,陈曦. 高速CMOS模拟集成电路中的静电保护电路设计[J]. 江南大学学报(自然科学版), 2005, 4(1): 19-22 |
| 作者姓名： | 吴鹏 何乐年 陈曦 |
| 作者单位： | 浙江大学,超大规模集成电路设计研究所,浙江,杭州,310027 |
| 摘 要： | 分析了静电放电(ESD)保护的基本原理，指出了传统的用于模拟电路的ESD保护电路在高速电路应用中的局限性，提出了在端口的栅极接地NMOS管和栅极接电源PMOS管的基础上，加上电源与地之间的高速静电泻放回路(片上保护)的新电路结构，仿真结果表明，该电路满足USB2.0高速接口电路的ESD保护要求，试验测试结果表明该ESD保护电路在人体模式下的击穿电压在正负2500V以上，具有实际的应用意义。 |
| 关 键 词： | 静电放电保护 人体模型 片上保护 栅极接地的NMOS |
| 文章编号： | 1671-7147(2005)01-0019-04 |
ESD Circuits Design for High-Speed Analog CMOS Integrated Circuits |
|
| WU Peng,HE Le-nian,CHEN Xi. ESD Circuits Design for High-Speed Analog CMOS Integrated Circuits[J]. Journal of Southern Yangtze University:Natural Science Edition, 2005, 4(1): 19-22 | |
| Authors: | WU Peng HE Le-nian CHEN Xi |
| Affiliation: | WU Peng,HE Le-nian~*,CHEN Xi |
| Abstract: | After analyzing the basic principle of Electrostatic Discharge,the limitation of traditional ESD protection circuits applied in high speed circuits was pointed out in the paper. Addition to the ggNMOS, ggPMOS connected the input and output, an on-chip protection with a high-speed discharge circuits between power source and ground was proposed. The simulation results indicate that this circuit can meet the ESD protection demand for USB2.0 high speed I/O design. The testing results also show that it can endure above 2500V in human-body model. This result has some practical meanings. |
| Keywords: | ESD HBM on-chip protection ggNMOS |
| 本文献已被 CNKI 维普 万方数据 等数据库收录！ | |