全速率准正交空时码的低复杂度编译码算法设计

为降低多输入多输出系统中,准正交空时分组码的编译码复杂度,本文提出了一种基于线性扩展的全分集全速率准正交空时分组码结构。对编码增益的计算结果表明,该结构可以取得与现有的最优全分集全速率准正交分组码具有相同的分集积；同时,该编码结构在基于有条件的最大似然译码算法中能有效降低译码的复杂度。仿真结果表明,所提编译码算法的误码率性能与现有的最优算法性能基本一致；但在4-QAM调制条件下,所提译码算法的加法和乘法运算次数能分别降低 4.3%和7.9%; 在16-QAM调制条件下,所提译码算法的加法和乘法运算次数分别降低了25.5%和31.8%；在64-QAM调制条件下,所提译码算法的加法和乘法运算次数能分别降低47.1%和54.1%。本文的结果有效验证了所提算法可以应用于高阶调制算法,且随着阶数的增加复杂度降低比率增高。

Design of Low Complexity Encoding and Decoding Algorithm for Full Rate Quasi-Orthogonal Space-Time Block Code

In order to reduce the complexity of quasi-orthogonal space-time block code in multiple-input and multiple-output systems, one full-diversity and full-rate quasi-orthogonal space-time block code structure based on linear extension is proposed. The results of the coding gain show that the proposed structure could obtain the same diversity products as that of the existing optimal full-diversity and full-rate quasi-orthogonal space-time block code. Further, the proposed structure can effectively reduce the complexity of decoding part based on conditional maximum likelihood decoding algorithm. Simulation results show that the bit error rate performance of the proposed algorithm is basically consistent with the performance of the existing optimal algorithms. However, under the 4-QAM modulation condition, the number of addition and multiplication operations of the proposed decoding algorithm can be reduced by 4.3% and 7.9% respectively. Under the 16-QAM modulation condition, the number of addition and multiplication times of the proposed decoding algorithm can be reduced by 25.5% and 31.8% respectively. Under the 64-QAM modulation condition, the number of addition and multiplication operations of the proposed decoding algorithm can be reduced by 47.1% and 54.1% respectively. The results of this paper effectively verify that the proposed structure can be applied to higher order modulation algorithms, and the complexity reduction ratio increases with the increase of the order.