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Fault-Tolerant Design Techniques in A CMP Architecture
引用本文:YAOWen.bin WANGDong-sheng. Fault-Tolerant Design Techniques in A CMP Architecture[J]. 武汉大学学报:自然科学英文版, 2005, 10(1): 5-8. DOI: 10.1007/BF02828605
作者姓名:YAOWen.bin WANGDong-sheng
作者单位:[1]DepartmentofComputerScienceandTsinghuaUniversity,Beijing100084,China//ResearchInstituteofInformationTsinghuaUniversity,Beijing100084,ChinaTechnology,Technology, [2]ResearchInstituteofInformationTechnology,TsinghuaUniversity,Beijing100084,China
基金项目:Supported by the National High Techology Devel opment 863 Program of China(2002AA1Z030) and China PostdoctoralScience Foundation(2003034151)
摘    要:Single-chip multiprocessor ( CMP ) combined with the fault-tolerant (FT) techniques offers an ideal architecture to achieve high availability on the basis of sustaining high computing performance. FT design of a single-chip multiprocessor is described, including the techniques from hardware redundancy to software support and firmware strategy. The design aims at masking the influences of errors and automatically correcting the system states.

关 键 词:容错设计 单片多处理机 计算机技术 软件 硬件
收稿时间:2004-05-06

Fault-tolerant design techniques in A CMP architecture
Yao Wen-bin,Wang Dong-sheng. Fault-tolerant design techniques in A CMP architecture[J]. Wuhan University Journal of Natural Sciences, 2005, 10(1): 5-8. DOI: 10.1007/BF02828605
Authors:Yao Wen-bin  Wang Dong-sheng
Affiliation:(1) Department of Computer Science and Technology, Tsinghua University, 10084 Beijing, China;(2) Research Institute of Information Technology, Tsinghua University, 10084 Beijing, China
Abstract:Single-chip multiprocessor(CMP) combined with the fault-tolerant(FT) techniques offers an ideal architecture to achieve high availability on the basis of sustaining high computing performance. FT design of a single-chip multiprocessor is described, including the techniques from hardware redundancy to software support and firmware strategy. The design aims at masking the influences of errors and automatically correcting the system states.
Keywords:computer architecture  fault-tolerant design  single-chip multiprocessor
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