| 一种逻辑电路图的布局算法 |
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| 引用本文： | 杨力列.一种逻辑电路图的布局算法[J].太原理工大学学报,1989(1). |
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| 作者姓名： | 杨力列 |
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| 作者单位： | 太原工业大学计算机科学与工程系 |
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| 摘 要： | 本文简述了从硬件描述语言到自动生成逻辑电路图的方法和步骤。在提出了与文献所不同的数学模型的基础上,设计了一种新的自动布局算法。该算法的时间复杂性在一般情况下远小于O(p·n~2)(p为元件列数,n为所有列中最大元件数),并且使连线总长及交叉点个数同时得到改善。本文的结果已在同期研制的逻辑/电路图编辑与自动生成系统中得到应用。
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| 关 键 词： | 计算机辅助设计 逻辑图 自动布局 |
An Automatic Formatting Algorithm for Logical Scehmatics Department of Computer Science |
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| Yang Lille.An Automatic Formatting Algorithm for Logical Scehmatics Department of Computer Science[J].Journal of Taiyuan University of Technology,1989(1). |
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| Authors: | Yang Lille |
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| Abstract: | In this paper, we discuss a method for automatic formatting logical schematics. Firstly, we present a new toothed which is different from the one in reference1,2]. Then art algorithm, by which both number of the cross points and the total lenth of lines are reduced, is given. The time complexity of this algorithm is lower then O(P.n~2). Also this algorithm has been coded in C language in the LEDS: Logical Schematics Editor and Automatic Formatting System3]. It's results are satisfactory. |
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| Keywords: | computer aided design logical schematics automatic layout algorithm |
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