Improving the electrical performance of resistive switching memory using doping technology

In this paper, improvements of resistive random access memory (RRAM) using doping technology are summarized and analyzed. Based on a Cu/ZrO2/Pt device, three doping technologies with Ti ions, Cu, and Cu nanocrystal, respectively, are adopted in the experiments. Compared to an undoped device, improvements focus on four points: eliminating the electroforming process, reducing operation voltage, improving electrical uniformity, and increasing device yield. In addition, thermal stability of the high resistance state and better retention are also achieved by the doping technology. We demonstrate that doping technology is an effective way of improving the electrical performance of RRAM.     

Approaches for improving the performance of filament-type resistive switching memory

Resistive random access memory (RRAM) has received significant research interest because of its promising potential in terms of down-scaling, high density, high speed and low power. However, its endurance, retention and uniformity are still imperfect. In this article, the physical mechanisms of filament-type RRAM and the approaches for improving the switching performance, including doping, process optimization and interface engineering, are introduced.     

An overview of resistive random access memory devices

With recent progress in material science, resistive random access memory (RRAM) devices have attracted interest for nonvolatile, low-power, nondestructive readout, and high-density memories. Relevant performance parameters of RRAM devices include operating voltage, operation speed, resistance ratio, endurance, retention time, device yield, and multilevel storage. Numerous resistive-switching mechanisms, such as conductive filament, space-charge-limited conduction, trap charging and discharging, Schottky Emission, and Pool-Frenkel emission, have been proposed to explain the resistive switching of RRAM devices. In addition to a discussion of these mechanisms, the effects of electrode materials, doped oxide materials, and different configuration devices on the resistive-switching characteristics in nonvolatile memory applications, are reviewed. Finally, suggestions for future research, as well as the challenges awaiting RRAM devices, are given.     

Nonvolatile resistive switching memories-characteristics,mechanisms and challenges

<正>This review presents a summary of current understanding of the resistive switching materials and devices which have inspired extraordinary interest all over the world.Although various switching behaviors and different conductive mechanisms are involved in the field,the resistive switching effects can be roughly classified into filament type and interface type according to their conducting behavior in low resistance state.For those filament based systems,the migration of metallic cations and oxygen vacancies, characterization of the filament as well as the role of Joule heating effects are discussed in detail.As to the interface based system, we describe the methods of modulating interface barrier height such as using different electrodes,inserting a tunnel layer.It is demonstrated that the switching mechanism can transform from one to another along the change of some specific conditions.We also give an overview on the latest developments in multilevel storage and the resistive switching in organic materials.In this paper,the solutions to address the sneak current problems in crossbar structure are discussed.     

Ion transport-related resistive switching in film sandwich structures

Resistive switching memories based on ion transport and related electrochemical reactions have been extensively studied for years. To utilize the resistive switching memories for high-performance information storage applications, a thorough understanding of the key information of ion transport process, including the mobile ion species, the ion transport paths, as well as the electrochemical reaction behaviors of these ions should be provided for material and device optimization. Moreover, ion transport is usually accompanied by processes of microstructure modification, phase transition, and energy band structure variation that lead to further modulation of other physical properties, e.g., magnetism, optical emission/absorbance, etc., in the resistive switching materials. Therefore, novel resistive switching memories that are controlled through additional means of magnetic or optical stimulus, or demonstrate extra functionalities beyond information storage, can be made possible via well-defined ion transportation in various switching materials and devices. In this contribution, the mechanism of ion transport and related resistive switching phenomena in thin film sandwich structures is discussed first, followed by a glanceat the recent progress in the development of high-performance and multifunctional resistive switching memories. A brief perspective of the ion transport-based resistive switching memories is addressed at the end of this review.     

Al2O3/HfO2薄膜多值阻变存储特性

采用磁控溅射和金属剥离工艺制备了结构为p-Si/HfO2/Ti和p-Si/HfO2/Al2O3/Ti的阻变存储器。两器件均表现出双极性电阻转变特性。插入的Al2O3层使得高阻态导电机制从空间电荷限制电流导电向肖特基发射控制导电转变,器件高低阻态阻值比从~61倍提高到了惊人的2.15×10^8倍。通过限制set电流的方式实现了多值存储,器件的四个阻态都能够非常稳定地在85 ℃高温下保持10^4 s,有利于多值存储的实际应用。     

An overview of the switching parameter variation of RRAM

Resistive random access memory（RRAM） has been considered as one of the most promising candidates for next-generation nonvolatile memory, due to its advantages of simple device structure, excellent scalability, fast operation speed and low power consumption. Deeply understanding the physical mechanism and effectively controlling the statistical variation of switching parameters are the basis of fostering RRAM into commercial application. In this paper, based on the deep understanding on the mechanism of the formation and rupture of conductive filament, we summarize the methods of analyzing and modeling the statistics of switching parameters such as SET/RESET voltage, current, speed or time. Then, we analyze the distributions of switching parameters and the influencing factors. Additionally, we also sum up the analytical model of resistive switching statistics composed of the cell-based percolation model and SET/RESET switching dynamics. The results of the model can successfully explain the experimental distributions of switching parameters of the Ni O- and Hf O2-based RRAM devices. The model also provides theoretical guide on how to improve the uniformity and reliability such as disturb immunity. Finally, some experimental approaches to improve the uniformity of switching parameters are discussed.     

Enhanced resistive switching properties of HfAlOx/ZrO2- based RRAM devices

Resistive Random-Access Memory (RRAM) devices are recognized as potential candidates for next-generation memory devices, due to their smallest cell size, high write/erase speed, and endurance. Particularly, the resistive switching (RS) characteristics in oxide materials have offered new opportunities for developing CMOS-compatible high-density RRAM devices. In this study, the RS behavior of HfAlO_x/ZrO₂ thin films sandwiched structure between TiN bottom electrode and Au top electrodes were investigated. It was found that Au/HfAlO_x/ZrO₂/TiN stacks were superior in terms of RS performance when compare to Au/HfAlO_x/TiN memory stacks. The devices demonstrated a good resistance ratio of high resistance state and low resistance state ～10³ for Au/HfAlO_x/TiN and ～10⁵ for Au/HfAlO_x/ZrO₂/TiN stacks, respectively. Both stacks showed good retention characteristics (>10⁴ ?s) and endurance (>10³ cycles). The experimental current-voltage characteristics fitted with different conducting mechanisms, the linear lower bias region is dominated by ohmic conductivity, whereas the non-linear higher bias region was dominated by space-charge limited current conduction mechanism.     

基于训练方式的存储器时钟信号的自适应同步

存储器是现代电子系统的核心器件之一, 常用于满足不同层次的数据交换与存储需求. 然而频率提高、时钟抖动、相位漂移以及不合理的布局布线等因素, 都可能导致CPU对存储器访问稳定性的下降. 针对同步动态随机读写存储器(synchronous dynamic random access memory, SDRAM)接口的时钟信号提出了一种自适应同步的训练方法, 即利用可控延迟链使时钟相位按照训练模式偏移到最优相位, 从而保证了存储器访问的稳定性. 在芯片内部硬件上提供了一个可通过CPU控制的延迟电路, 用来调整SDRAM时钟信号的相位. 在系统软件上设计了训练程序, 并通过与延迟电路的配合来达到自适应同步的目的：当CPU访问存储器连续多次发生错误时, 系统抛出异常并自动进入训练模式. 该模式令CPU在SDRAM中写入测试数据并读回, 比对二者是否一致. 根据测试数据比对结果, 按训练模式调整延迟电路的延迟时间. 经过若干次迭代, 得到能正确访问存储器的延迟时间范围, 即“有效数据采样窗口”,取其中值即为SDRAM最优时钟相位偏移. 完成训练后对系统复位, 并采用新的时钟相位去访问存储器, 从而保证读写的稳定性. 仿真实验结果表明, 本方法能迅速而准确地捕捉到有效数据采样窗口的两个端点位置, 并以此计算出最佳的延迟单元数量, 从而实现提高访问外部SDRAM存储器稳定性的目的.     

氧化钽/氧化铝薄膜的阻变特性和突触特性

通过微电子加工工艺,制备出具有ITO/TaO_x/AlO_x/Ti结构的双介质层阻变存储器.器件中引入的氧化铝介质层有效地减小了器件的运行电流,降低了高/低阻态间切换所需的功耗,并增大了高/低阻态电阻比值.研究表明,器件的高低态电阻与其切换电压均有良好的稳定性和均匀性,且器件表现出可靠的擦写性能与保持性能.进一步研究表明,器件高阻态导电受肖特基发射机制主导,低阻态导电受空间电荷限制机制主导.器件还具有连续可调的电阻渐变行为,利用反复电脉冲刺激下的器件电阻变化来表征突触的权值,可以模拟突触行为.     

阻变存储器读电路的优化设计

随着阻变存储器高阻态和低阻态间阻值窗口的减小,电流型灵敏放大器的读正确率降低.设计了一款电压型灵敏放大器,应用在读电路中,有效地解决了这一问题.该电压型灵敏放大器电路结构简单,经SMIC0.13μm下流片验证,它的读出时间为125ns,面积仅为756μm2,功耗为41.25μW,读窗口为260mV,相比电流型灵敏放大器50mV的读窗口有了很大的改进.     

面向非易失内存的结构和系统级设计与优化综述

当今各类计算机应用都进入一个飞速发展的阶段,无论是计算密集型还是存储密集型应用都对存储系统的容量、性能以及功耗不断提出更高的要求.然而,由于传统内存工艺(DRAM)的发展落后于计算逻辑工艺(CMOS),基于DRAM的内存设计逐渐无法满足这些设计需求.同时,基于HDD的外存性能与DRAM主存间的差距也逐渐增加.而各种非易失存储工艺取得长足的进步,为解决这一问题提供了新的机遇.本文就近年来针对非易失内存的结构和系统级设计与优化的研究工作进行综述,揭示非易失内存对存储系统的性能、功耗等都有明显的改善.     

NiOx阻变存储器性能增强方法及相关机理研究

通过精确控制在Pt衬底上制备NiOx薄膜的工艺过程,制备出阻值窗口增大5倍以上,高低阻态稳定的TiN/NiOx/Pt结构阻变存储器.研究发现,NiOx薄膜的多晶态结晶结构和化学组分,尤其是Ni元素的化学态,是影响NiOx阻变存储器阻值窗口和稳定性的主要因素.X射线光电子能谱和X射线多晶体衍射测试结果表明,当NiOx薄膜中间隙氧或Ni2+空位增多时,Ni2+会被氧化成为Ni3+以保持电中性,Ni3+离子在材料中引入空穴导致P型氧化物NiO的漏电流增大.基于此机理,提出通过提高淀积温度、降低氧气分压的方法抑制NiOx薄膜中间隙氧或Ni2+空位的产生,降低TiN/NiOx/Pt结构阻变存储器关态漏电流,增大阻值窗口.这种基于工艺的性能增强方法,在NiOx阻变存储器实际应用中有良好前景.     

Investigation of the synaptic device based on the resistive switching behavior in hafnium oxide

Metal-oxide based electronics synapse is promising for future neuromorphic computation application due to its simple structure and fab-friendly materials. HfOx resistive switching memory has been demonstrated superior performance such as high speed, low voltage, robust reliability, excellent repeatability, and so on. In this work, the HfOx synaptic device was investigated based on its resistive switching phenomenon. HfOx resistive switching device with different electrodes and dopants were fabricated. TiN/Gd:HfOx/Pt stack exhibited the best synaptic performance, including controllable multilevel ability and low training energy consumption. The training schemes for memory and forgetting were developed.     

Viterbi译码性能分析及路径存储长度影响的研究

论述了卷积码Viterbi译码误码率性能的分析方法。通过对计算机仿真所得数据的分析表明路径存储长度对译码性能的影响有限。同时还研究了利用生成函数分析路径存储长度对译码性能影响的方法和局限性。讨论了影响译码性能的可能存在的一些因素。     

微机RAM的一种软件检测方法

本文提出用一般高级语言编程实现对用户区ＲＡＭ读／写错误检测的原理及方法，并在ＰＣ微机上用ＦＯＲＴＲＡＮ语言实现。     

基于二维数据DRAM访问的缓冲管理器设计

根据DVD数据处理速度的要求和纠错数据块的特征,提出一种基于数据重排的数据访问管理方式,实现高速高效DRAM访问的数据缓冲管理器设计,达到比较高的RS PC行和列译码速度,以实现全程流水线处理的RS PC译码器设计.本设计采用MT4 8LC8M 16A2 ,可以达到二维数据访问方式,其DRAM带宽80Mbyte×16bit/s ,满足RS PC译码4 0Mbyte/s码字处理的缓冲要求,该设计为其他二维结构数据的DRAM访问提供一种可供参考的设计方法,具有很好的实用性.     

引入SRAM的三级缓存技术在高速通信中的应用

在高速通信过程中,数据处理系统通常需要数据缓存来实时存储收到的数据.利用现场可编程门阵列(field programmable gate array,FPGA)内部资源构建的先进先出(first in first out,FIFO),其容量有限,在数据通信过程中由于读写速度不匹配而导致FIFO溢出,从而出现丢数现象.为此设计并实现了一种三级缓存结构,在FPGA外部引入1 MByte容量的静态随机存储器(static random access memory,SRAM)作为中间级缓存,输入级和输出级缓存为FPGA内部的FIFO,FPGA控制数据的传榆和对SRAM的读写操作.采用三级缓存技术,简化