文章摘要
基于CMOS工艺的10位逐次逼近型模数转换器设计分析
Design and Analysis of An 10 -bit Successive Approximation ADC Based on CMOS Technics
  
DOI:10.3969/j.issn.1671-5322.2006.04.012
中文关键词: 逐次逼近型模数转换器  比较器  数模转换器
英文关键词: successive-approximation ADC  comparator  digital-to-analog converter
基金项目:
作者单位
季红兵 南通大学电子信息学院江苏南通226007 
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中文摘要:
      逐次逼近型模数转换器由于性能折衷而得到了广泛的应用.其中,比较器和数模转换器的精度和速度极大地限制了整个系统的性能.因此,具有失配校准功能的比较器是逐次逼近型模数转换器的关键.设计了10bit逐次逼近型模数转换器中的比较器,对比较器的电路结构和工作原理有较详细的论述.
英文摘要:
      The successive-approximation analog-to-digital converter is widely used because of its eclectic capabilities.In this kind of converter,the speed and precision of comparator and digital-to-analog converter greatly affect the performance of the whole system.Therefore,the design of comparator with offset cancellation technology is the key to the SAR ADC.A comparator used in a 10-bit SAR ADC is designed and presented in this paper.The author describes the architecture of this comparator in detail.
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